Field of the Invention
Individual memory cells in memory cell configurations are driven via bit lines and word lines. Each bit line and word line intersection is distinctly assigned a memory cell that can be selected by means of the intersection. This applies to all memory cell configurations, in particular dynamic and static memory cell configurations, to read-only memory cell configurations and to electrically programmable memory cell configurations.
The bit lines and word lines are usually produced as a mass of parallel lines. To select individual bit and word lines, the periphery of the memory cell configuration is provided with selector switches or decoder circuits which are electrically connected to each of the lines. The electrical connection between the bit lines and word lines and the selector switch or the decoder circuit is produced, in technological terms, by means of contact holes filled with contacts, and a metallization plane.
The requirement of etching the contact holes for connecting the parallel lines limits the packing density that can be attained.